JVM developer interface
ORTHO Java SDK
Problem
Stable application-facing interfaces over the ORTHO system contracts.
Approach
Typed Java APIs for devices, tensor jobs, execution traces, and verification results, with a simulator transport.
Verification and limits
Simulator tests do not establish FPGA or ASIC performance. Hardware transport support must be checked against the current project documentation.
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License
BSL / AGPL / MPL — see terms. The actual project terms govern use.
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